Power diode, rectifier, and semiconductor device including the same

ABSTRACT

With a non-linear element (e.g., a diode) with small reverse saturation current, a power diode or rectifier is provided. A non-linear element includes a first electrode provided over a substrate, an oxide semiconductor film provided on and in contact with the first electrode and having a concentration of hydrogen of 5×10 19  atoms/cm 3  or less, a second electrode provided on and in contact with the oxide semiconductor film, a gate insulating film covering the first electrode, the oxide semiconductor film, and the second electrode, and third electrodes provided in contact with the gate insulating film and facing each other with the first electrode, the oxide semiconductor film, and the second electrode interposed therebetween or a third electrode provided in contact with the gate insulating film and surrounding the second electrode. The third electrodes are connected to the first electrode or the second electrode. With the non-linear element, a power diode or a rectifier is formed.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a divisional of U.S. application Ser. No. 12/912,315, filed Oct. 26, 2010, now allowed, which claims the benefit of a foreign priority application filed in Japan as Serial No. 2009-251203 on Oct. 30, 2009, both of which are incorporated by reference.

TECHNICAL FIELD

The present invention relates to a power diode and a rectifier including a non-linear element using an oxide semiconductor. Furthermore, the present invention relates to a semiconductor device including the power diode or the rectifier.

BACKGROUND ART

Among semiconductor devices, diodes are required to have high withstand voltage, small reverse saturation current, and the like. In order to meet such a requirement, a diode in which silicon carbide (SiC) is used has been researched. Silicon carbide used as a semiconductor material has a width of a forbidden band of 3 eV or more, excellent controllability of electric conductivity at high temperature, and is more resistant to dielectric breakdown than silicon. Therefore, silicon carbide is expected to be applied to a diode in which reverse saturation current is small and withstand voltage is high. For example, a Schottky barrier diode in which silicon carbide is used and reverse leakage current is reduced is known (Patent Document 1).

However, in the case of using silicon carbide, it is difficult to obtain crystals with good quality, and further, a device can be fabricated only at high process temperature. For example, an ion implantation method is used to form an impurity region in silicon carbide; in that case, heat treatment at 1500° C. or higher is necessary in order to activate a dopant or repair crystal defects caused by ion implantation.

In addition, since carbon is contained as a component in silicon carbide, an insulating film with good quality cannot be formed by thermal oxidation. Furthermore, silicon carbide is chemically very stable and is not easily etched by normal wet etching.

REFERENCE

-   [Patent Document 1] Japanese Published Patent Application No.     2000-133819

DISCLOSURE OF INVENTION

As described above, although a diode in which silicon carbide is used is expected to have high withstand voltage and small reverse saturation current, there are many problems in manufacturing and achieving such an element.

In view of the above, it is an object of an embodiment of the present invention to provide a power diode or a rectifier including a diode with small reverse saturation current. In addition, it is an object to manufacture a diode with small reverse saturation current at low process temperature (e.g., less than or equal to 800° C.) and to provide a power diode or a rectifier including the diode.

An embodiment of the present invention provides a power diode and a rectifier including a diode which can be miniaturized and includes a field-effect transistor, for example, a thin film transistor that can be manufactured at low process temperature and has large on-state current and small off-state current. The diode includes a first electrode provided over a substrate, an oxide semiconductor film provided on and in contact with the first electrode and purified, a second electrode provided on and in contact with the oxide semiconductor film, a gate insulating film covering the first electrode, the oxide semiconductor film, and the second electrode, and third electrodes provided in contact with the gate insulating film and facing each other with the first electrode, the oxide semiconductor film, and the second electrode interposed therebetween or a third electrode provided in contact with the gate insulating film and surrounding the second electrode. In the non-linear element, the third electrodes or the third electrode are/is connected to the first electrode or the second electrode, and a current flows between the first electrode and the second electrode.

A power diode capable of conducting a larger amount of current than a conventional power diode can be obtained.

A rectifier having a higher withstand voltage than a conventional rectifier can be obtained.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1A-1, 1A-2, 1B-1, 1B-2, 1C-1, and 1C-2 each illustrate a power diode or a rectifier which is one embodiment of the present invention.

FIGS. 2A and 2B are a top view and a cross-sectional view illustrating a diode which is one embodiment of the present invention.

FIGS. 3A and 3B are a top view and a cross-sectional view illustrating a diode which is one embodiment of the present invention.

FIGS. 4A and 4B are a top view and a cross-sectional view illustrating a diode which is one embodiment of the present invention.

FIGS. 5A and 5B are a top view and a cross-sectional view illustrating a diode which is one embodiment of the present invention.

FIGS. 6A and 6B are a top view and a cross-sectional view illustrating a diode which is one embodiment of the present invention.

FIGS. 7A and 7B are a top view and a cross-sectional view illustrating a diode which is one embodiment of the present invention.

FIGS. 8A to 8E are cross-sectional views illustrating a method for manufacturing a diode which is one embodiment of the present invention.

FIGS. 9A and 9B are cross-sectional views illustrating a method for manufacturing a diode which is one embodiment of the present invention.

FIG. 10 illustrates an example of a semiconductor device which is one embodiment of the present invention.

FIGS. 11A to 11F each illustrate an example of application of a semiconductor device which is one embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the description below, and it will be easily understood by those skilled in the art that modes and details thereof can be changed in various ways without departing from the spirit and the scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments. Note that in structures of the present invention described hereinafter, like portions or portions having similar functions are denoted by the same reference numerals in different drawings, and description thereof is not repeated.

Note that in each drawing described in this specification, the size of each component or the thickness of each layer or an area is exaggerated in some cases for clarification. Therefore, embodiments of the present invention are not limited to such scales.

Note that terms such as “first”, “second”, and “third” in this specification are used in order to avoid confusion among components, and the terms do not limit the components numerically. Therefore, for example, description can be made even when “first” is replaced with “second” or “third”, as appropriate.

Note that a voltage refers to a difference between potentials of two points, and a potential refers to electrostatic energy (electric potential energy) of a unit charge at a given point in an electrostatic field. Note that in general, a difference between a potential of one point and a reference potential (e.g., a ground potential) is simply called a potential or a voltage, and a potential and a voltage are used as synonymous words in many cases. Thus, in this specification, a potential may be rephrased as a voltage and a voltage may be rephrased as a potential unless otherwise specified.

Embodiment 1

In this embodiment, examples of structures of a power diode and a rectifier which are embodiments of the present invention will be described with reference to FIGS. 1A-1, 1A-2, 1B-1, 1B-2, 1C-1, and 1C-2.

FIG. 1A-1 illustrates an example of a structure of a power diode which is one embodiment of the present invention. In the power diode illustrated in FIG. 1A-1, a plurality of diodes is connected in series in a forward direction.

FIG. 1B-1 illustrates an example of a structure of a rectifier which is one embodiment of the present invention. The rectifier illustrated in FIG. 1B-1 is a half-wave rectifier including two diodes. An anode of a first diode is connected to a lower potential side reference potential (preferably, a ground potential). A cathode of the first diode is connected to an input portion and an anode of a second diode. A cathode of the second diode is connected to an output portion.

FIG. 1C-1 illustrates an example of a structure of a rectifier which is one embodiment of the present invention. The rectifier illustrated in FIG. 1C-1 is a full-wave rectifier including four diodes. An anode of a first diode is connected to a lower potential side reference potential (preferably, a ground potential), and a cathode of the first diode is connected to an “input portion”. An anode of the second diode is connected to the “input portion”, and a cathode of the second diode is connected to a higher potential side reference potential (preferably, a power supply potential). An anode of a third diode is connected to the lower potential side reference potential (preferably, a ground potential), and a cathode of the third diode is connected to an “output portion”. An anode of a fourth diode is connected to the “output portion”, and a cathode of the fourth diode is connected to the higher potential side reference potential (preferably, a power supply potential).

The diodes used herein can each be obtained by diode-connecting a source or a drain of a field-effect transistor, including a thin film transistor to a gate thereof. An example of such a diode is illustrated in FIGS. 2A and 2B. The power diode of FIG. 1A-1 can be configured with transistors as illustrated in FIG. 1A-2. The rectifier of FIG. 1B-1 can be configured with transistors as illustrated in FIG. 1B-2. The rectifier of FIG. 1C-1 can be configured with transistors as illustrated in FIG. 1C-2.

In the diode illustrated in FIGS. 2A and 2B, a wiring 125 is connected to a third electrode 113, a third electrode 115, and a second electrode 109, and the second electrode 109 is connected to a first electrode 105 through an oxide semiconductor film 107. The first electrode 105 is connected to a wiring 131.

FIG. 2A is a top view of a diode-connected thin film transistor 133. FIG. 2B is a cross-sectional view along dashed-and-dotted line A-B in FIG. 2A.

As illustrated in FIG. 2B, the first electrode 105, the oxide semiconductor film 107, and the second electrode 109 are stacked over an insulating film 103 which is formed over a substrate 101. A gate insulating film 111 is provided so as to cover the first electrode 105, the oxide semiconductor film 107, and the second electrode 109. The third electrode 113 and the third electrode 115 are provided over the gate insulating film 111. An insulating film 117 functioning as an interlayer insulating film is provided over the gate insulating film 111, the third electrode 113, and the third electrode 115. Openings are formed in the gate insulating film 111 and the insulating film 117, and the wiring 131 (see FIG. 2A) connected to the first electrode 105 and the wiring 125 connected to the second electrode 109, the third electrode 113, and the third electrode 115 are formed in the openings. The first electrode 105 functions as one of a source electrode and a drain electrode of the thin film transistor. The second electrode 109 functions as the other of the source electrode and the drain electrode of the thin film transistor. The third electrode 113 and the third electrode 115 function as a gate electrode of the thin film transistor.

The thin film transistor according to this embodiment is a vertical thin film transistor, which has features that the third electrode 113 and the third electrode 115 which function as a gate electrode are separated and that the third electrode 113 and the third electrode 115 face each other with the first electrode 105, the oxide semiconductor film 107, and the second electrode 109 interposed therebetween.

Note that a thin film transistor is an element that includes at least three terminals, including a gate, a drain, and a source. The thin film transistor includes a channel formation region between a drain region and a source region, and current can flow through the drain region, the channel formation region, and the source region. Here, since the source and the drain of the thin film transistor may change depending on a structure, operating conditions, and the like of the thin film transistor, it is difficult to define which is a source or a drain. Therefore, a region functioning as a source and a drain is not called the source or the drain in some cases. In such a case, for example, one of the source and the drain may be referred to as a first terminal and the other may be referred to as a second terminal. Alternatively, one of the source and the drain may be referred to as a first electrode and the other may be referred to as a second electrode. Further alternatively, one of the source and the drain may be referred to as a first region and the other may be referred to a second region.

It is necessary that the substrate 101 at least have heat resistance sufficient to withstand heat treatment to be performed later. As the substrate 101, a glass substrate of barium borosilicate glass, aluminoborosilicate glass, or the like can be used.

As the glass substrate, in the case where the temperature of the heat treatment to be performed later is high, the one whose strain point is 730° C. or higher is preferably used. As a glass substrate, a glass material such as aluminosilicate glass, aluminoborosilicate glass, or barium borosilicate glass is used, for example. Note that in general, by containing a larger amount of barium oxide (BaO) than boron oxide, a glass substrate which is heat-resistant and more practical can be obtained. Therefore, a glass substrate containing BaO and B₂O₃ so that the amount of BaO is larger than that of B₂O₃ is preferably used.

Note that a substrate formed of an insulator, such as a ceramic substrate, a quartz substrate, or a sapphire substrate, may be used, instead of the glass substrate. Alternatively, a crystallized glass substrate or the like may be used.

The insulating film 103 is formed using an oxide insulating film such as a silicon oxide film or a silicon oxynitride film, or a nitride insulating film such as a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, or an aluminum nitride oxide film. In addition, the insulating film 103 may have a stacked structure, for example, a stacked structure in which one or more of the nitride insulating films and one or more of the oxide insulating film are stacked in that order over the substrate 101.

The first electrode 105 and the second electrode 109 are formed using an element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, and yttrium, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like. Alternatively, one or more materials selected from manganese, magnesium, zirconium, beryllium, and thorium can be used. In addition, the first electrode 105 can have a single-layer structure or a stacked structure having two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure of an aluminum film and a titanium film stacked thereover, a two-layer structure of a tungsten film and a titanium film stacked thereover, a three-layer structure in which a titanium film, an aluminum film, and a titanium film are stacked in that order, and the like can be given. Alternatively, a film, an alloy film, or a nitride film which contains aluminum and one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium may be used.

As the oxide semiconductor film 107, a thin film of a material expressed by InMO₃(ZnO)_(m) (m>0, where m is not an integer) can be used. Here, M represents one or more metal elements selected from Ga, Fe, Ni, Mn, and Co. For example, M may be Ga, Ga and Ni, Ga and Fe, or the like. The oxide semiconductor film may contain a transition metal element or an oxide of the transition metal element as an impurity element in addition to the metal element contained as M. An oxide semiconductor whose composition formula is represented as InMO₃ (ZnO)_(m) (m>0, where m is not an integer) where Ga is contained as M is referred to as an In—Ga—Zn—O-based oxide semiconductor, and a thin film thereof is referred to as an In—Ga—Zn—O-based film.

As the oxide semiconductor film 107, any of the following oxide semiconductor films can be used besides the In—Ga—Zn—O-based oxide semiconductor film: an In—Sn—Zn—O-based oxide semiconductor film; an In—Al—Zn—O-based oxide semiconductor film; a Sn—Ga—Zn—O-based oxide semiconductor film; an Al—Ga—Zn—O-based oxide semiconductor film; a Sn—Al—Zn—O-based oxide semiconductor film; an In—Zn—O-based oxide semiconductor film; a Sn—Zn—O-based oxide semiconductor film; an Al—Zn—O-based oxide semiconductor film; an In—O-based oxide semiconductor film; a Sn—O-based oxide semiconductor film; and a Zn—O-based oxide semiconductor film. Further, Si may be contained in the above oxide semiconductor film.

In the oxide semiconductor film 107 used in this embodiment, hydrogen is contained at 5×10¹⁹ atoms/cm³ or less, preferably 5×10¹⁸ atoms/cm³ or less, more preferably 5×10¹⁷ atoms/cm³ or less, and hydrogen is removed from the oxide semiconductor film. In other words, the oxide semiconductor film is purified so that impurities that are not main components of the oxide semiconductor film are contained as little as possible. The carrier concentration of the oxide semiconductor film 107 is 5×10¹⁴ atoms/cm³ or less, preferably 1×10¹⁴ atoms/cm³ or less, more preferably 5×10¹² atoms/cm³ or less, still more preferably 1×10¹² atoms/cm³ or less. That is, the carrier concentration of the oxide semiconductor film is close to zero. Furthermore, the energy gap is 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. Note that the hydrogen concentration of the oxide semiconductor film can be measured by secondary ion mass spectrometry (SIMS). In addition, the carrier density can be measured by the Hall effect measurement.

The thickness of the oxide semiconductor film 107 may be 30 nm to 3000 nm. When the thickness of the oxide semiconductor film 107 is small, the channel length of the thin film transistor can be decreased; thus, a thin film transistor having large on current and high field-effect mobility can be manufactured. On the other hand, when the thickness of the oxide semiconductor film 107 is large, typically 100 nm to 3000 nm, a high-power semiconductor device can be manufactured.

The gate insulating film 111 can be a single-layer or a stack formed using any of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, a silicon nitride oxide film, and an aluminum oxide film. A portion of the gate insulating film 111 which is in contact with the oxide semiconductor film 107 preferably contains oxygen, and in particular, the portion of the gate insulating film 111 is preferably formed using a silicon oxide film. By using a silicon oxide film, oxygen can be supplied to the oxide semiconductor film 107 and favorable characteristics can be obtained. The thickness of the gate insulating film 111 may be 50 nm to 500 nm. When the thickness of the gate insulating film 111 is small, a thin film transistor having high field-effect mobility can be manufactured; thus, a driver circuit can be manufactured over the same substrate as the thin film transistor. On the other hand, when the thickness of the gate insulating film 111 is large, gate leakage current can be reduced.

When the gate insulating film 111 is formed using a high-k material such as hafnium silicate (HfSiO_(x) (x>0)), HfSiO_(x) (x>0) to which N is added, hafnium aluminate (HfAlO_(x) (x>0)), hafnium oxide, or yttrium oxide, gate leakage can be reduced. Further, a stacked structure can be used in which a high-k material and one or more of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, a silicon nitride oxide film, and an aluminum oxide film are stacked.

The third electrode 113 and the third electrode 115 which function as a gate electrode are formed using an element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like. Alternatively, one or more materials selected from manganese, magnesium, zirconium, and beryllium may be used. In addition, the third electrode 113 and the third electrode 115 can have a single-layer structure or a stacked structure having two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure of an aluminum film and a titanium film stacked thereover, a three-layer structure in which a titanium film, an aluminum film, and a titanium film are stacked in that order, and the like can be given. Alternatively, a film, an alloy film, or a nitride film which contains aluminum and one or more elements selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium may be used.

The oxide semiconductor film in this embodiment is an intrinsic (i-type) or substantially intrinsic oxide semiconductor film obtained by removal of hydrogen, which is an n-type impurity, from the oxide semiconductor film and the increase in purity so that an impurity other than the main components of the oxide semiconductor film is not included as much as possible. In other words, the oxide semiconductor film in this embodiment is a purified intrinsic (i-type) oxide semiconductor film or an oxide semiconductor film which is close to a purified intrinsic oxide semiconductor film obtained not by addition of an impurity but by removal of an impurity such as hydrogen, water, a hydroxyl group, or hydride as much as possible. In this manner, the Fermi level (E_(f)) can be at the same level as the intrinsic Fermi level (E_(i)).

By removing the impurity as much as possible as described above, for example, even when the channel width W of the thin film transistor is 1×10⁴ μm and the channel length thereof is 3 μm, off current can be less than or equal to 10⁻¹³ A, which is extremely small, and a subthreshold swing (S value) can be 0.1 V/dec (the gate insulating film with a thickness of 100 nm).

As described above, when the oxide semiconductor film is purified so that impurities that are not main components of the oxide semiconductor film, typically hydrogen, water, a hydroxyl group, or hydride, are contained as little as possible, favorable operation of the thin film transistor can be obtained. In particular, off current can be reduced.

In a lateral thin film transistor in which a channel is formed substantially in parallel with a substrate, a source and a drain as well as the channel need to be provided laterally, so that an area occupied by the thin film transistor in the substrate is increased, which hinders miniaturization. However, in a vertical thin film transistor, a source, a channel, and a drain are stacked, whereby an area occupied by the thin film transistor in a substrate surface can be reduced. As a result of this, it is possible to miniaturize the thin film transistor.

The channel length of the vertical thin film transistor can be controlled by the thickness of the oxide semiconductor film; therefore, when the oxide semiconductor film 107 is formed to have a small thickness, a thin film transistor having a short channel length can be provided. When the channel length is reduced, series resistance of the source, the channel, and the drain can be reduced; therefore, on current and field-effect mobility of the thin film transistor can be increased. In addition, a thin film transistor having the purified oxide semiconductor film whose hydrogen concentration is reduced is in an insulating state where off current is extremely small and almost no current flows when the thin film transistor is off. Therefore, even when the thickness of the oxide semiconductor film is decreased to reduce the channel length of the vertical thin film transistor, a thin film transistor in which almost no off current flows in a non-conduction state can be provided.

As described above, using a purified oxide semiconductor film whose hydrogen concentration is reduced makes it possible to manufacture a thin film transistor which is suitable for higher definition, has high operation speed, and is capable of conducting a large amount of current in an on state and almost no current in an off state.

Note that the diode described in this embodiment is not limited to that illustrated in FIGS. 2A and 2B. In the diode illustrated in FIGS. 2A and 2B, current flows through the oxide semiconductor film 107 from the second electrode 109 to the first electrode 105. A structure in which current flows through the oxide semiconductor film 107 from the first electrode 105 to the second electrode 109 as illustrated in FIGS. 3A and 3B may be employed.

In a diode illustrated in FIGS. 3A and 3B, a wiring 125 is connected to a third electrode 113, a third electrode 115, and a first electrode 105. The first electrode 105 is connected to a second electrode 109 through an oxide semiconductor film 107. The second electrode 109 is connected to a wiring 131.

In the diode illustrated in FIGS. 3A and 3B, a wiring 125 is provided so as not to overlap with other electrodes and the like; therefore, parasitic capacitance generated between the wiring 125 and other electrodes can be suppressed.

By connecting a source or a drain of a thin film transistor to a gate thereof as described above, a diode in which reverse current is very small can be obtained. Therefore, a diode which is resistant to a breakdown (i.e., has high withstand voltage) can be manufactured.

With the use of the above diode, a power diode capable of conducting a larger amount of current than a conventional power diode can be obtained.

Alternatively, with the use of the above diode, a rectifier having a higher withstand voltage than a conventional rectifier can be obtained.

Embodiment 2

In this embodiment, an example of a diode, which can be applied to a power diode and a rectifier of embodiments of the present invention and which has a structure different from that in Embodiment 1, will be described with reference to FIGS. 4A and 4B. The diode which is described in this embodiment can be obtained by connecting a source or a drain of a field-effect transistor, including a thin film transistor to a gate thereof.

In the diode illustrated in FIGS. 4A and 4B, a wiring 131 is connected to a first electrode 105 and a third electrode 113, and a wiring 132 is connected to a first electrode 106 and a third electrode 115. The first electrode 105 and the first electrode 106 are connected to a second electrode 109 through an oxide semiconductor film 107. The second electrode 109 is connected to a wiring 129.

FIG. 4A is a top view of diode-connected thin film transistors 141 and 143. FIG. 4B is a cross-sectional view along dashed-and-dotted line A-B in FIG. 4A.

As illustrated in FIG. 4B, the first electrode 105, the first electrode 106, the oxide semiconductor film 107, and the second electrode 109 are stacked over an insulating film 103 which is formed over a substrate 101. A gate insulating film 111 is provided so as to cover the first electrode 105, the first electrode 106, the oxide semiconductor film 107, and the second electrode 109. The third electrode 113 and the third electrode 115 are provided over the gate insulating film 111. An insulating film 117 functioning as an interlayer insulating film is provided over the gate insulating film 111, the third electrode 113, and the third electrode 115. Openings are formed in the insulating film 117. The wiring 131 connected to the first electrode 105 and the third electrode 113 each through the opening, the wiring 132 connected to the first electrode 106 and the third electrode 115 each through the opening (see FIG. 4A), and the wiring 129 connected to the second electrode 109 through the opening are formed.

The first electrode 105 functions as one of a source electrode and a drain electrode of the thin film transistor 141. The first electrode 106 functions as one of a source electrode and a drain electrode of the thin film transistor 143. The second electrode 109 functions as the other of the source electrode and the drain electrode of each of the thin film transistors 141 and 143. The third electrode 113 functions as a gate electrode of the thin film transistor 141. The third electrode 115 functions as a gate electrode of the thin film transistor 143.

A feature of this embodiment is that the first electrode 105 and the first electrode 106 are separated from each other (see FIGS. 4A and 4B).

Furthermore, a feature is that the thin film transistor 141 and the thin film transistor 143 are connected in parallel by the second electrode 109 and the wiring 129 in FIGS. 4A and 4B. In that case, the first electrode 105 functions as one of the source electrode and the drain electrode (e.g., the source) of the thin film transistor 141. The second electrode 109 functions as the other of the source electrode and the drain electrode (e.g., the drain) of the thin film transistor 141. The third electrode 113 functions as the gate electrode of the gate electrode of the thin film transistor 141. The second electrode 109 also functions as one of the source electrode and the drain electrode (e.g., the drain) of the thin film transistor 143. The first electrode 106 functions as the other of the source electrode and the drain electrode (e.g., the source) of the thin film transistor 143. The third electrode 115 functions as the gate electrode of the thin film transistor 143. Also, a conductive layer for connecting the first electrode 105 and the first electrode 106 may be provided.

Alternatively, the thin film transistor 141 and the thin film transistor 143 may be connected in series by the second electrode 109. In that case, the wiring 129 is not necessarily provided, and a signal may be output from a wiring 132.

The thin film transistors 141 and 143 of this embodiment are formed using a purified oxide semiconductor film whose hydrogen concentration is reduced, in a manner similar to that of Embodiment 1. Therefore, favorable operation of the thin film transistors can be obtained. In particular, off current can be reduced. As a result of this, a thin film transistor which is suitable for higher definition, has high operation speed, and is capable of conducting a large amount of current in an on state and almost no current in an off state can be manufactured.

Note that the diode described in this embodiment is not limited to that illustrated in FIGS. 4A and 4B. In the diode illustrated in FIGS. 4A and 4B, current flows through the oxide semiconductor film 107 from the first electrode 105 to the second electrode 109. A structure in which current flows through the oxide semiconductor film 107 from the second electrode 109 to the first electrode 105 as illustrated in FIGS. 5A and 5B may be employed.

In the diode illustrated in FIGS. 5A and 5B, a wiring 125 is connected to a third electrode 113, a third electrode 115, and a second electrode 109. The second electrode 109 is connected to a first electrode 105 and a first electrode 106 through an oxide semiconductor film 107. The first electrode 105 is connected to a wiring 131, and the first electrode 106 is connected to a wiring 132.

In the diode illustrated in FIGS. 5A and 5B, the wiring 125 is provided so as to overlap with a thin film transistor 141 and a thin film transistor 143. However, without limitation thereto, the wiring 125 may be provided so as not to overlap with the thin film transistor 141 and the thin film transistor 143 as in FIGS. 3A and 3B. When the wiring 125 does not overlap with the thin film transistor 141 and the thin film transistor 143, parasitic capacitance generated between the wiring 125 and electrodes of the thin film transistors can be suppressed.

By connecting a source or a drain of a thin film transistor to a gate thereof as described above, a diode in which reverse current is very small can be obtained. Therefore, a diode which is resistant to a breakdown (i.e., has high withstand voltage) can be manufactured.

With the use of the above diode, a power diode capable of conducting a larger amount of current than a conventional power diode can be obtained.

Alternatively, with the use of the above diode, a rectifier having a higher withstand voltage than a conventional rectifier can be obtained.

Embodiment 3

In this embodiment, an example of a diode, which can be applied to a power diode and a rectifier of embodiments of the present invention and which has a structure different from those in Embodiments 1 and 2, will be described with reference to FIGS. 6A and 6B. The diode which is described in this embodiment can be obtained by connecting a source or a drain of a field-effect transistor, including a thin film transistor to a gate thereof.

In the diode illustrated in FIGS. 6A and 6B, a wiring 131 is connected to a first electrode 105 and a third electrode 113. The first electrode 105 is connected to a second electrode 109 through an oxide semiconductor film 107. The second electrode 109 is connected to a wiring 129.

FIG. 6A is a top view of a diode-connected thin film transistor 145. FIG. 6B is a cross-sectional view along dashed-and-dotted line A-B in FIG. 6A.

As illustrated in FIG. 6B, the first electrode 105, the oxide semiconductor film 107, and the second electrode 109 are stacked over an insulating film 103 formed over a substrate 101. A gate insulating film 111 is provided so as to cover the first electrode 105, the oxide semiconductor film 107, and the second electrode 109. The third electrode 113 is provided over the gate insulating film 111. The insulating film 117 functioning as an interlayer insulating film is provided over the gate insulating film 111 and the third electrode 113. Openings are formed in the insulating film 117. The wiring 131 connected to the first electrode 105 and the third electrode 113 each through the opening (see FIG. 6A), and a wiring 129 connected to the second electrode 109 through the opening are formed.

The first electrode 105 functions as one of a source electrode and a drain electrode of the thin film transistor 145. The second electrode 109 functions as the other of the source electrode and the drain electrode of the thin film transistor 145. The third electrode 113 functions as a gate electrode of the thin film transistor 145.

In this embodiment, the third electrode 113 functioning as the gate electrode has a ring shape. When the third electrode 113 functioning as the gate electrode has a ring shape, the channel width of the thin film transistor can be increased. Accordingly, on current of the thin film transistor can be increased.

The thin film transistor 145 of this embodiment is formed using a purified oxide semiconductor film whose hydrogen concentration is reduced, in a manner similar to that of Embodiment 1. Therefore, favorable operation of the thin film transistor can be obtained. In particular, off current can be reduced. As a result of this, a thin film transistor which is suitable for higher definition, has high operation speed, and is capable of conducting a large amount of current in an on state and almost no current in an off state can be manufactured.

Note that the diode described in this embodiment is not limited to that illustrated in FIGS. 6A and 6B. In the diode illustrated in FIGS. 6A and 6B, current flows through the oxide semiconductor film 107 from the first electrode 105 to the second electrode 109. A structure in which current flows through the oxide semiconductor film 107 from the second electrode 109 to the first electrode 105 as illustrated in FIGS. 7A and 7B may be employed.

In the diode illustrated in FIGS. 7A and 7B, a wiring 129 is connected to a second electrode 109 and a third electrode 113. The second electrode 109 is connected to a first electrode 105 through an oxide semiconductor film 107. The first electrode 105 is connected to a wiring 131.

By connecting a source or a drain of a thin film transistor to a gate thereof as described above, a diode in which reverse current is very small can be obtained. Therefore, a diode which is resistant to a breakdown (i.e., has high withstand voltage) can be manufactured.

With the use of the above diode, a power diode capable of conducting a larger amount of current than a conventional power diode can be obtained.

Alternatively, with the use of the above diode, a rectifier having a higher withstand voltage than a conventional rectifier can be obtained.

Embodiment 4

In this embodiment, a manufacturing process of the diode-connected field-effect transistor, including a thin film transistor in FIGS. 2A and 2B, which can be applied to a power diode and a rectifier of embodiments of the present invention, will be described with reference to FIGS. 8A to 8E.

As illustrated in FIG. 8A, the insulating film 103 is formed over the substrate 101, and the first electrode 105 is formed over the insulating film 103. The first electrode 105 functions as one of the source electrode and the drain electrode of the thin film transistor.

The insulating film 103 can be formed by a sputtering method, a CVD method, a coating method, or the like.

Note that when the insulating film 103 is formed by a sputtering method, the insulating film 103 is preferably formed while hydrogen, water, a hydroxyl group, hydride, or the like remaining in a treatment chamber is removed. This is for preventing hydrogen, water, a hydroxyl group, hydride, or the like from being contained in the insulating film 103. It is preferable to use an entrapment vacuum pump in order to remove hydrogen, water, a hydroxyl group, hydride, or the like remaining in the treatment chamber. As the entrapment vacuum pump, a cryopump, an ion pump, or a titanium sublimation pump is preferably used, for example. Further, as an evacuation unit, a cold trap may be added to a turbo pump. Since impurities, particularly, hydrogen, water, a hydroxyl group, hydride, or the like are removed from the treatment chamber which is evacuated using a cryopump, when the insulating film 103 is formed in the treatment chamber, the concentration of impurities contained in the insulating film 103 can be reduced.

As a sputtering gas used for forming the insulating film 103, a high purity gas is preferably used in which impurities such as hydrogen, water, a hydroxyl group, or hydride are reduced to a concentration of 1 ppm or lower (preferably, 10 ppb or lower). Note that the sputtering gas means a gas which is introduced into a treatment chamber where sputtering is performed.

Examples of a sputtering method include an RF sputtering method in which a high-frequency power source is used for a sputtering power source, a DC sputtering method in which a direct current power source is used, and a pulsed DC sputtering method in which a bias is applied in a pulsed manner. The RF sputtering method is mainly used in the case where an insulating film is formed, whereas the DC sputtering method is mainly used in the case where a metal film is formed.

There is also a multi-source sputtering apparatus in which a plurality of targets of different materials can be set. With the multi-source sputtering apparatus, films of different materials can be formed to be stacked in the same chamber, or films of plural kinds of materials can be formed by electric discharge at the same time in the same chamber.

Alternatively, a sputtering apparatus provided with a magnet system inside the chamber and used for a magnetron sputtering method, or a sputtering apparatus used for an ECR sputtering method in which plasma generated with the use of microwaves is used without using glow discharge can be used.

Further, as a sputtering method, a reactive sputtering method in which a target substance and a sputtering gas component are chemically reacted with each other during deposition to form a thin compound film thereof, or a bias sputtering method in which voltage is also applied to a substrate during deposition can be used.

As the sputtering in this specification, the above-described sputtering apparatus and the sputtering method can be employed as appropriate.

In this embodiment, the substrate 101 is transferred to the treatment chamber. A sputtering gas containing high purity oxygen, from which hydrogen, water, a hydroxyl group, hydride, or the like is removed, is introduced into the treatment chamber, and a silicon oxide film is formed as the insulating film 103 over the substrate 101 using a silicon target. Note that when the insulating film 103 is formed, the substrate 101 may be heated.

For example, the silicon oxide film is formed by an RF sputtering method under the following conditions: quartz (preferably, synthesized quartz) is used; the substrate temperature is 108° C.; the distance between the target and the substrate (the T-S distance) is 60 mm, the pressure is 0.4 Pa; the high frequency power source is 1.5 kW; and the atmosphere contains oxygen and argon (the flow ratio of oxygen to argon is 1:1 (each flow rate is 25 sccm)). The film thickness may be 100 nm, for example. Note that instead of quartz (preferably, synthesized quartz), a silicon target can be used. Note that as the sputtering gas, oxygen, or a mixed gas of oxygen and argon is used.

For example, when the insulating film 103 is formed using a stacked structure, a silicon nitride film is formed using a silicon target and a sputtering gas containing high purity nitrogen from which hydrogen, water, a hydroxyl group, hydride, or the like is removed, between the silicon oxide film and the substrate. Also in this case, it is preferable that a silicon nitride film be formed while hydrogen, water, a hydroxyl group, hydride, or the like remaining in the treatment chamber is removed in a manner similar to the case of the silicon oxide film. Note that in the process, the substrate 101 may be heated.

When a silicon nitride film and a silicon oxide film are stacked as the insulating film 103, the silicon nitride film and the silicon oxide film can be formed using a common silicon target in the same treatment chamber. First, a sputtering gas containing nitrogen is introduced into the treatment chamber, and a silicon nitride film is formed using a silicon target provided in the treatment chamber; next, the sputtering gas containing nitrogen is switched to a sputtering gas containing oxygen, and a silicon oxide film is formed using the same silicon target. The silicon nitride film and the silicon oxide film can be formed in succession without being exposed to air; therefore, impurities such as hydrogen, water, a hydroxyl group, or hydride can be prevented from being adsorbed on the surface of the silicon nitride film.

The first electrode 105 can be formed in such a manner that a conductive film is formed over the substrate 101 by a sputtering method, a CVD method, or a vacuum evaporation method, a resist mask is formed over the conductive film in a photolithography step, and the conductive film is etched using the resist mask. Alternatively, the first electrode 105 can be formed by a printing method or an inkjet method without using a photolithography step, so that the number of steps can be reduced. Note that end portions of the first electrode 105 preferably have a tapered shape, so that the coverage with a gate insulating film to be formed later improves. When the angle formed between the end portion of the first electrode 105 and the insulating film 103 is 30° to 60° (preferably, 40° to 50°), the coverage with the gate insulating film to be formed later can be improved.

In this embodiment, as the conductive film for forming the first electrode 105, a titanium film is formed to have a thickness of 50 nm by a sputtering method, an aluminum film is formed to have a thickness of 100 nm, and a titanium film is formed to have a thickness of 50 nm. Next, etching is performed using the resist mask formed in the photolithography step, whereby the first electrode 105 having an island shape is formed.

Next, as illustrated in FIG. 8B, the oxide semiconductor film 107 and the second electrode 109 are formed over the first electrode 105. The oxide semiconductor film 107 functions as a channel formation region of the thin film transistor, and the second electrode 109 functions as the other of the source electrode and the drain electrode of the thin film transistor.

Here, a method for manufacturing the oxide semiconductor film 107 and the second electrode 109 will be described.

An oxide semiconductor film is formed by a sputtering method over the substrate 101 and the first electrode 105. Next, a conductive film is formed over the oxide semiconductor film.

As pretreatment, it is preferable that the substrate 101 provided with the first electrode 105 be preheated in a preheating chamber of a sputtering apparatus and impurities such as hydrogen, water, a hydroxyl group, or hydride adsorbed on the substrate 101 be eliminated and removed so that hydrogen is contained in the oxide semiconductor film 107 as little as possible. Note that a cryopump is preferable for an evacuation unit provided in the preheating chamber. Note that this preheating treatment can be omitted. In addition, this preheating may be performed on the substrate 101 before the formation of the gate insulating film 111, or may be performed on the substrate 101 before the formation of the third electrode 113 and the third electrode 115.

Note that before the oxide semiconductor film is formed by a sputtering method, reverse sputtering in which plasma is generated with an argon gas introduced is preferably performed to remove dust attached to or an oxide film formed on the surface of the first electrode 105, so that resistance at the interface between the first electrode 105 and the oxide semiconductor film can be reduced. The reverse sputtering refers to a method in which, without application of voltage to a target side, a high-frequency power source is used for application of voltage to a substrate side in an argon atmosphere to generate plasma in the vicinity of the substrate and modify a surface. Note that instead of an argon atmosphere, a nitrogen atmosphere, a helium atmosphere, or the like may be used.

In this embodiment, the oxide semiconductor film is formed by a sputtering method with the use of an In—Ga—Zn—O-based metal oxide target. Alternatively, the oxide semiconductor film can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas (typically, argon) and oxygen. When a sputtering method is employed, a target containing SiO₂ at 2 wt % to 10 wt % may be used.

As a sputtering gas used for forming the oxide semiconductor film, a high purity gas is preferably used in which impurities such as hydrogen, water, a hydroxyl group, or hydride are reduced to a concentration of 1 ppm or lower (preferably, 10 ppb or lower).

As a target used to form the oxide semiconductor film by a sputtering method, a target of a metal oxide containing zinc oxide as a main component can be used. As another example of a target of a metal oxide, a metal oxide target containing In, Ga, and Zn (in a composition ratio, In₂O₃:Ga₂O₃:ZnO=1:1:1 [molar ratio], In:Ga:Zn=1:1:0.5 [molar ratio]) can be used. Alternatively, as a metal oxide target containing In, Ga, and Zn, a target having a composition ratio of In:Ga:Zn=1:1:1 [molar ratio] or In:Ga:Zn=1:1:2 [molar ratio] can be used. The filling rate of the metal oxide target is 90% to 100%, preferably 95% to 99.9%. An oxide semiconductor film formed using the metal oxide target with high filling rate as described above is dense.

The oxide semiconductor film is formed over the substrate 101 in such a manner that a sputtering gas from which hydrogen, water, a hydroxyl group, hydride, or the like is removed is introduced into the treatment chamber and a metal oxide is used as a target while the substrate is held in the treatment chamber in a reduced pressure state and moisture remaining in the treatment chamber is removed. It is preferable to use an entrapment vacuum pump in order to remove hydrogen, water, a hydroxyl group, hydride, or the like remaining in the treatment chamber. A cryopump, an ion pump, or a titanium sublimation pump is preferably used, for example. Further, as an evacuation unit, a cold trap may be added to a turbo pump. For example, hydrogen, water, a hydroxyl group, hydride, or the like (more preferably, also a compound containing a carbon atom) are removed from the treatment chamber which is evacuated using a cryopump; therefore, the concentration of impurities contained in the oxide semiconductor film can be reduced. The oxide semiconductor film may be formed while the substrate is heated.

In this embodiment, as an example of a film formation condition of the oxide semiconductor film, the following conditions are applied: the substrate temperature is room temperature, the distance between the substrate and the target is 110 mm; the pressure is 0.4 Pa; the direct current (DC) power source is 0.5 kW; and the atmosphere contains oxygen and argon (oxygen flow rate of 15 sccm, argon flow rate of 30 sccm). Note that a pulsed direct current (DC) power source is preferable because powder substances (also referred to as particles or dust) generated in film formation can be reduced and the film thickness can be uniform. The oxide semiconductor film preferably has a thickness of 30 nm to 3000 nm. Note that the appropriate thickness of the oxide semiconductor film differs depending on the material to be used; therefore, the thickness may be determined as appropriate in accordance with the material.

Note that the sputtering method and sputtering apparatus that are used for forming the insulating film 103 can be used as appropriate as a sputtering method and a sputtering apparatus for forming the oxide semiconductor film.

The conductive film for forming the second electrode 109 can be formed using the material and the method which are used for the first electrode 105, as appropriate. Here, as the conductive film for forming the second electrode 109, a 50-nm-thick titanium film, a 100-nm-thick aluminum film, and a 50-nm-thick titanium film are stacked in that order.

Next, a resist mask is formed over the conductive film in a photolithography step, the conductive film for forming the second electrode 109 and the oxide semiconductor film for forming the oxide semiconductor film 107 are etched using the resist mask, whereby the second electrode 109 and the oxide semiconductor film 107 having island shapes are formed. Instead of the resist mask formed in the photolithography step, a resist mask can be formed using an inkjet method, so that the number of steps can be reduced. When the angle formed between the first electrode 105 and the end portions of the second electrode 109 and the oxide semiconductor film 107 is 30° to 60° (preferably, 40° to 50°) because of the etching, the coverage with a gate insulating film to be formed later can be improved.

Note that the etching of the conductive film and the oxide semiconductor film here may be performed using either dry etching or wet etching, or using both dry etching and wet etching. In order to form the oxide semiconductor film 107 and the second electrode 109 each having a desired shape, an etching condition (etchant, etching time, temperature, or the like) is adjusted as appropriate in accordance with a material.

When the etching rate of each of the conductive film for forming the second electrode 109 and the oxide semiconductor film is different from that of the first electrode 105, a condition is selected such that the etching rate of the first electrode 105 is low and the etching rate of each of the conductive film for forming the second electrode 109 and the oxide semiconductor film is high. Alternatively, a condition is selected such that the etching rate of the oxide semiconductor film is low and the etching rate of the conductive film for forming the second electrode 109 is high, and the conductive film for forming the second electrode 109 is etched; then, a condition is selected such that the etching rate of the first electrode 105 is low and the etching rate of the oxide semiconductor film is high.

As an etchant used for wet etching of the oxide semiconductor film, a mixed solution of phosphoric acid, acetic acid, and nitric acid, an ammonia hydrogen peroxide mixture (a 31 wt % hydrogen peroxide solution:28 wt % ammonia water:water=5:2:2), or the like can be used. In addition, ITO-07N (produced by KANTO CHEMICAL CO., INC.) may also be used.

The etchant after the wet etching is removed together with the etched materials by cleaning. The waste liquid containing the etchant and the material etched off may be purified and the material may be reused. When a material such as indium contained in the oxide semiconductor film is collected from the waste liquid after the etching and reused, the resources can be efficiently used and the cost can be reduced.

As an etching gas used for dry etching of the oxide semiconductor film, a gas containing chlorine (a chlorine-based gas such as chlorine (Cl₂), boron trichloride (BCl₃), silicon tetrachloride (SiCl₄), or carbon tetrachloride (CCl₄)) is preferably used.

Alternatively, a gas containing fluorine (a fluorine-based gas such as carbon tetrafluoride (CF₄), sulfur hexafluoride (SF₆), nitrogen trifluoride (NF₃), or trifluoromethane (CHF₃)), hydrogen bromide (HBr), oxygen (O₂), any of these gases to which a rare gas such as helium (He) or argon (Ar) is added, or the like can be used.

As the dry etching method, a parallel plate RIE (reactive ion etching) method or an ICP (inductively coupled plasma) etching method can be used. In order to etch the film into a desired shape, the etching conditions (the amount of electric power applied to a coil-shaped electrode, the amount of electric power applied to an electrode on a substrate side, the temperature of the electrode on the substrate side, or the like) is adjusted as appropriate.

In this embodiment, the conductive film for forming the second electrode 109 is etched using an ammonia hydrogen peroxide mixture (a mixture of ammonia, water, and hydrogen peroxide water) as an etchant, and then the oxide semiconductor film is etched using a mixed solution of phosphoric acid, acetic acid, and nitric acid, whereby the oxide semiconductor film 107 having an island shape is formed.

Next, in this embodiment, first heat treatment is performed. The first heat treatment is performed at a temperature higher than or equal to 400° C. and lower than or equal to 750° C., preferably, higher than or equal to 400° C. and lower than a strain point of the substrate. Here, the substrate is introduced into an electric furnace which is one of heat treatment apparatuses, and heat treatment is performed on the oxide semiconductor film in an inert gas atmosphere, such as a nitrogen atmosphere or a rare gas atmosphere, at 450° C. for one hour, and then the oxide semiconductor film is not exposed to air. Accordingly, hydrogen, water, a hydroxyl group, hydride, or the like can be prevented from being mixed into the oxide semiconductor film, hydrogen concentration is reduced, and the oxide semiconductor film is purified, whereby an i-type oxide semiconductor film or a substantially i-type oxide semiconductor film can be obtained. That is, at least one of dehydration and dehydrogenation of the oxide semiconductor film 107 can be performed by this first heat treatment.

Note that it is preferable that in the first heat treatment, hydrogen, water, a hydroxyl group, hydride, or the like be not contained in nitrogen or a rare gas such as helium, neon, or argon. Alternatively, the purity of nitrogen or a rare gas such as helium, neon, or argon introduced into a heat treatment apparatus is preferably 6N (99.9999%) or higher, more preferably 7N (99.99999%) or higher (that is, the concentration of the impurities is 1 ppm or lower, preferably 0.1 ppm or lower).

Depending on the conditions of the first heat treatment or a material for the oxide semiconductor film, the oxide semiconductor film may be crystallized and changed to a microcrystalline film or a polycrystalline film in some cases. For instance, the oxide semiconductor film may be crystallized to be a microcrystalline oxide semiconductor film having a degree of crystallization of 90% or more, or 80% or more. Further, depending on the conditions of the first heat treatment and the material of the oxide semiconductor film, the oxide semiconductor film may become an amorphous oxide semiconductor film containing no crystalline component. The oxide semiconductor film may become an oxide semiconductor film in which a microcrystalline portion (with a grain diameter of 1 nm to 20 nm (typically, 2 nm to 4 nm) is mixed into the amorphous oxide semiconductor film.

Alternatively, the first heat treatment of the oxide semiconductor film may be performed on the oxide semiconductor film before the oxide semiconductor film having an island shape is formed. In that case, the substrate is taken out from the heating apparatus after the first heat treatment, and then a photolithography step is performed.

Note that the heat treatment which has an effect of dehydration or dehydrogenation on the oxide semiconductor film may be performed after the oxide semiconductor film is formed, after the conductive film for forming the second electrode is stacked over the oxide semiconductor film, after the gate insulating film is formed over the first electrode, the oxide semiconductor film, and the second electrode, or after the gate electrode is formed.

Next, as illustrated in FIG. 8C, the gate insulating film 111 is formed over the first electrode 105, the oxide semiconductor film 107, and the second electrode 109.

The i-type oxide semiconductor film (the purified oxide semiconductor film whose hydrogen concentration is reduced) or the substantially i-type oxide semiconductor film obtained by the removal of impurities is extremely sensitive to an interface state and interface charge; therefore, the interface between the oxide semiconductor film and the gate insulating film 111 is important. Accordingly, the gate insulating film 111 which is in contact with the purified oxide semiconductor film needs to have high quality.

For example, a high-quality insulating film which is dense and which has high withstand voltage can be formed by a high density plasma CVD method using microwaves (2.45 GHz), which is preferable. This is because when the purified oxide semiconductor film whose hydrogen concentration is reduced and the high-quality gate insulating film are close to each other, the interface state can be reduced and the interface characteristics can be made favorable.

Needless to say, other film formation methods, such as a sputtering method or a plasma CVD method, can be applied as long as a high-quality insulating film can be formed as the gate insulating film. A gate insulating film whose film quality is improved, or an insulating film whose characteristics of an interface with the oxide semiconductor film are improved, by the heat treatment after the gate insulating film is formed may be used. In any case, any insulating film that has a reduced interface state density and can form a favorable interface with the oxide semiconductor as well as having a favorable film quality as a gate insulating film can be used.

Further, when an oxide semiconductor film containing impurities is subjected to a gate bias-temperature stress test (BT test) at 85° C., at a voltage applied to the gate of 2×10⁶ V/cm, for 12 hours, a bond between the impurity and a main component of the oxide semiconductor film is cleaved by a high electric field (B: bias) and a high temperature (T: temperature), and a generated dangling bond induces drift of threshold voltage (V_(th)).

In contrast, the present invention makes it possible to obtain a thin film transistor which is stable to a BT test by removing impurities in an oxide semiconductor film, especially hydrogen, water, and the like as much as possible to obtain a favorable characteristic of an interface between the oxide semiconductor and a gate insulating film as described above.

When the gate insulating film 111 is formed by a sputtering method, the hydrogen concentration in the gate insulating film 111 can be reduced. When a silicon oxide film is formed by a sputtering method, silicon or quartz is used as a target and oxygen or a mixed gas of oxygen and argon is used as a sputtering gas.

The gate insulating film 111 can have a structure in which a silicon oxide film and a silicon nitride film are stacked in that order over the first electrode 105, the oxide semiconductor film 107, and the second electrode 109. For example, a silicon oxide film (SiO_(x) (x>0)) having a thickness of 5 nm to 300 nm is formed as a first gate insulating film, and a silicon nitride film (SiN_(y) (y>0)) having a thickness of 50 nm to 200 nm is stacked as a second gate insulating film over the first gate insulating film by a sputtering method, so that a gate insulating film having a thickness of 100 nm may be formed. In this embodiment, a silicon oxide film having a thickness of 100 nm is formed by an RF sputtering method under the following conditions: the pressure is 0.4 Pa; the high-frequency power is 1.5 kW; and the atmosphere contains oxygen and argon (the flow ratio of oxygen to argon is 1:1 (each flow rate is 25 sccm)).

Next, second heat treatment may be performed in an inert gas atmosphere or an oxygen gas atmosphere (preferably, at 200° C. to 400° C., for example, 250° C. to 350° C.). Note that the second heat treatment may be performed after the formation of at least one of the third electrode 113, the third electrode 115, the insulating film 117, and the wirings 125 and 131, which is performed later. Hydrogen or moisture contained in the oxide semiconductor film can be diffused into the gate insulating film by the heat treatment.

Then, the third electrode 113 and the third electrode 115 which function as a gate electrode are formed over the gate insulating film 111.

The third electrode 113 and the third electrode 115 can be formed in such a manner that a conductive film for forming the third electrode 113 and the third electrode 115 is formed over the gate insulating film 111 by a sputtering method, a CVD method, or a vacuum evaporation method, a resist mask is formed in a photolithography step over the conductive film, and the conductive film is etched using the resist mask.

In this embodiment, after a titanium film having a thickness of 150 nm is formed by a sputtering method, etching is performed using a resist mask formed in a photolithography step, so that the third electrode 113 and the third electrode 115 are formed.

Through the above process, the thin film transistor 133 having the purified oxide semiconductor film 107 whose hydrogen concentration is reduced can be formed.

Next, as illustrated in FIG. 8D, after the insulating film 117 is formed over the gate insulating film 111, the third electrode 113, and the third electrode 115, a contact hole 119, a contact hole 121, and a contact hole 123 are formed.

The insulating film 117 is formed using an oxide insulating film such as a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, or an aluminum oxynitride film, or a nitride insulating film such as a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, or an aluminum nitride oxide film. Alternatively, an oxide insulating film and a nitride insulating film can be stacked.

The insulating film 117 is formed by a sputtering method, a CVD method, or the like. Note that when the insulating film 117 is formed by a sputtering method, the substrate 101 may be heated to a temperature of 100° C. to 400° C., a sputtering gas in which hydrogen, water, a hydroxyl group, hydride, or the like is removed and which contains high purity nitrogen may be introduced, and an insulating film may be formed using a silicon target. Also in this case, an insulating film is preferably formed while hydrogen, water, a hydroxyl group, hydride, or the like remaining in the treatment chamber is removed.

Note that after the insulating film 117 is formed, heat treatment may be performed in the air at a temperature of 100° C. to 200° C. for 1 hour to 30 hours. A normally-off thin film transistor can be obtained by this heat treatment. Therefore, reliability of a semiconductor device can be improved.

A resist mask is formed in a photolithography step, and parts of the gate insulating film 111 and the insulating film 117 are removed by selective etching, whereby the contact hole 119, the contact hole 121, and the contact hole 123 which reach the first electrode 105, the second electrode 109, the third electrode 113, and the third electrode 115 are formed.

Next, after a conductive film is formed over the gate insulating film 111, the contact hole 119, the contact hole 121, and the contact hole 123, etching is performed using a resist mask formed in a photolithography step, whereby the wiring 125 and the wiring 131 are formed. Note that the resist mask may be formed by an inkjet method. No photomask is used when a resist mask is formed by an inkjet method; therefore, production cost can be reduced.

The wiring 125 and the wiring 131 can be formed in a manner similar to that of the first electrode 105.

Note that a planarization insulating film for planarization may be provided between the third electrodes 113 and 115 and the wirings 125 and 131. An organic material having heat resistance, such as polyimide, acrylic, benzocyclobutene, polyamide, or epoxy can be used as typical examples of the planarization insulating film. Other than such organic materials, it is also possible to use a low-dielectric constant material (a low-k material), a siloxane-based resin, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), or the like. Note that the planarization insulating film may be formed by stacking a plurality of insulating films formed from these materials.

Note that the siloxane-based resin corresponds to a resin including a Si—O—Si bond formed using a siloxane-based material as a starting material. The siloxane-based resin may include an organic group (e.g., an alkyl group or an aryl group) or a fluoro group as a substituent. Moreover, the organic group may include a fluoro group.

There is no particular limitation on the method for forming the planarization insulating film. The planarization insulating film can be formed, depending on the material, by a method such as a sputtering method, an SOG method, a spin coating method, a dipping method, a spray coating method, or a droplet discharge method (e.g., an inkjet method, screen printing, or offset printing), or a tool such as a doctor knife, a roll coater, a curtain coater, or a knife coater.

Through the above process, the hydrogen concentration in the oxide semiconductor film can be reduced, and the oxide semiconductor film can be purified. Accordingly, the oxide semiconductor film can be stabilized. In addition, an oxide semiconductor film which has an extremely small number of minority carriers and a wide band gap can be formed by heat treatment at a temperature of lower than or equal to the glass transition temperature. As a result, a thin film transistor can be formed using a large-area substrate; thus, the mass productivity can be improved. In addition, with the use of the purified oxide semiconductor film whose hydrogen concentration is reduced, it is possible to manufacture a thin film transistor which is suitable for higher definition, has high operation speed, and is capable of conducting a large amount of current when turned on and almost no current when turned off.

By connecting a source or a drain of a thin film transistor to a gate thereof as described above, a diode in which reverse current is very small can be obtained. Therefore, a diode which is resistant to a breakdown (i.e., has high withstand voltage) can be manufactured.

With the use of a diode manufactured as described in this embodiment, a power diode capable of conducting a larger amount of current than a conventional power diode can be obtained. Alternatively, with the use of the above diode, a rectifier having a higher withstand voltage than a conventional rectifier can be obtained.

Note that in order to eliminate impurities such as hydrogen, water, a hydroxyl group, or hydride (also referred to as a hydrogen compound) which may exist in the oxide semiconductor film or at the interface between the oxide semiconductor film and an insulating film that is provided in contact with the oxide semiconductor film, a halogen element (e.g., fluorine or chlorine) may be contained in the insulating film that is provided in contact with the oxide semiconductor film, or a halogen element may be contained in an oxide semiconductor film by plasma treatment in a gas atmosphere containing a halogen element in a state where the oxide semiconductor film is exposed. When the insulating film contains a halogen element, the halogen element concentration in the insulating film may be approximately 5×10¹⁸ atoms/cm³ to 1×10²⁰ atoms/cm³.

As described above, in the case where a halogen element is contained in the oxide semiconductor film or at the interface between the oxide semiconductor film and the insulating film that is in contact with the oxide semiconductor film and the insulating film that is provided in contact with the oxide semiconductor film is an oxide insulating film, a side of the oxide insulating film which is not in contact with the oxide semiconductor film is preferably covered with a nitrogen insulating film. That is, a silicon nitride film or the like may be provided on and in contact with the oxide insulating film that is in contact with the oxide semiconductor film. With such a structure, impurities such as hydrogen, water, a hydroxyl group, or hydride can be prevented from entering the oxide insulating film.

Note that the diodes illustrated in FIGS. 3A and 3B, FIGS. 4A and 4B, FIGS. 5A and 5B, FIGS. 6A and 6B, and FIGS. 7A and 7B can also be formed in a similar manner.

This embodiment can be implemented in an appropriate combination with any of structures described in other embodiments.

Embodiment 5

In this embodiment, a method for manufacturing a diode which can be applied to a power diode and a rectifier of embodiments of the present invention and a method for manufacturing a diode-connected field-effect transistor, including a thin film transistor including an oxide semiconductor film which is different from that described in Embodiment 4 will be described with reference to FIGS. 8A to 8E and FIGS. 9A and 9B.

In a manner similar to that in Embodiment 4, as illustrated in FIG. 8A, the insulating film 103 and the first electrode 105 are formed over the substrate 101. Next, as illustrated in FIG. 8B, the oxide semiconductor film 107 and the second electrode 109 are formed over the first electrode 105.

Next, first heat treatment is performed. The first heat treatment in this embodiment is different from the first heat treatment in the above embodiment. The heat treatment makes it possible to form an oxide semiconductor film 151 in which crystal grains are formed at the surface as illustrated in FIG. 9A. In this embodiment, the first heat treatment is performed with an apparatus for heating an object to be processed by at least one of thermal conduction and thermal radiation from a heater such as a resistance heater. Here, the temperature of the heat treatment is 500° C. to 700° C., preferably 650° C. to 700° C. Note that, although there is no requirement for the upper limit of the heat treatment temperature from the essential part of the invention, the upper limit of the heat treatment temperature needs to be within the allowable temperature limit of the substrate 101. In addition, the length of time of the heat treatment is preferably 1 minute to 10 minutes. When RTA treatment is employed for the first heat treatment, the heat treatment can be performed in a short time; thus, adverse effects of heat on the substrate 101 can be reduced. In other words, the upper limit of the heat treatment temperature can be raised in this case as compared with the case where heat treatment is performed for a long time. In addition, the crystal grains having predetermined structures can be selectively formed in the vicinity of the surface of the oxide semiconductor film.

As examples of the heat treatment apparatus that can be used in this embodiment, rapid thermal annealing (RTA) apparatuses such as a gas rapid thermal annealing (GRTA) apparatus and a lamp rapid thermal annealing (LRTA) apparatus, and the like are given. An LRTA apparatus is an apparatus for heating an object to be processed by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp. A GRTA apparatus is an apparatus for heat treatment using a high-temperature gas. As the gas, an inert gas which does not react with an object to be processed by heat treatment, such as nitrogen or a rare gas like argon, is used.

For example, as the first heat treatment, GRTA may be performed in which the substrate is moved into an atmosphere of an inert gas such as nitrogen or a rare gas which has been heated to a temperature as high as 650° C. to 700° C., and the substrate is heated for several minutes and moved out of the inert gas which has been heated to a high temperature. GRTA enables high-temperature heat treatment to be performed in a short time.

Note that in the first heat treatment, it is preferable that hydrogen, water, a hydroxyl group, hydride, or the like be not contained in nitrogen or a rare gas such as helium, neon, or argon. Alternatively, the purity of nitrogen or a rare gas such as helium, neon, or argon that is introduced into the heat treatment apparatus is preferably 6N (99.9999%) or higher, more preferably 7N (99.99999%) or higher (that is, the impurity concentration is 1 ppm or lower, preferably 0.1 ppm or lower).

Note that the above heat treatment may be performed at any timing as long as it is performed after the oxide semiconductor film 107 is formed; however, in order to promote dehydration or dehydrogenation, the heat treatment is preferably performed before other components are formed on a surface of the oxide semiconductor film 107. In addition, the heat treatment may be performed plural times instead of once.

FIG. 9B is an enlarged view of a dashed line portion 153 in FIG. 9A.

The oxide semiconductor film 151 includes an amorphous region 155 that mainly contains an amorphous oxide semiconductor and crystal grains 157 that are formed at the surface of the oxide semiconductor film 151. Further, the crystal grains 157 are formed in a region extending from the surface to a distance (depth) of 20 nm or less (in the vicinity of the surface). Note that the location where the crystal grains 157 are formed is not limited to the above in the case where the thickness of the oxide semiconductor film 151 is large. For example, in the case where the oxide semiconductor film 151 has a thickness of 200 nm or more, the “vicinity of a surface (surface vicinity)” means a region extending from the surface to a distance (depth) that is 10% or less of the thickness of the oxide semiconductor film.

Here, the amorphous region 155 mainly contains an amorphous oxide semiconductor film. Note that the word “mainly” means, for example, a state where one occupies 50% or more of a region. In this case, it means a state where the amorphous oxide semiconductor film occupies 50% or more at volume % (or weight %) of the amorphous region 155. In other words, the amorphous region in some cases includes crystals of an oxide semiconductor film other than an amorphous oxide semiconductor film, and the percentage of the content thereof is preferably less than 50% at volume % (or weight %). However, the percentage of the content is not limited to the above range.

In the case where an In—Ga—Zn—O-based oxide semiconductor is used as a material for the oxide semiconductor film, the composition of the above amorphous region 155 is preferably set so that the Zn content (atomic %) is less than the In or Ga content (atomic %) for the reason that such composition makes it easy for the crystal grains 157 which have predetermined composition to be formed.

After that, a gate insulating film and a third electrode that functions as a gate electrode are formed in a manner similar to that of Embodiment 4 to complete the thin film transistor.

The vicinity of the surface of the oxide semiconductor film 151, which is in contact with the gate insulating film, serves as a channel. The crystal grains are included in the region that serves as a channel, whereby the resistance between a source, the channel, and a drain is reduced and carrier mobility is increased. Thus, the field-effect mobility of the thin film transistor in which the oxide semiconductor film 151 is included is increased, which leads to favorable electric characteristics of the thin film transistor.

Further, the crystal grains 157 are more stable than the amorphous region 155; thus, when the crystal grains 157 are included in the vicinity of the surface of the oxide semiconductor film 151, entry of impurities (e.g., hydrogen, water, a hydroxyl group, or hydride) into the amorphous region 155 can be reduced. Thus, the reliability of the oxide semiconductor film 151 can be improved.

Through the above process, the concentration of hydrogen in the oxide semiconductor film can be reduced and the oxide semiconductor film can be purified. Thus, stabilization of the oxide semiconductor film can be achieved. In addition, heat treatment at a temperature of lower than or equal to the glass transition temperature makes it possible to form an oxide semiconductor film with a wide band gap in which the number of minority carriers is extremely small. Thus, thin film transistors can be manufactured using a large-area substrate; thus, the mass productivity can be improved. Further, with the use of the purified oxide semiconductor film whose hydrogen concentration is reduced, it is possible to manufacture a thin film transistor which is suitable for higher definition, has high operation speed, and is capable of conducting a large amount of current when turned on and almost no current when turned off.

By connecting a source or a drain of a thin film transistor to a gate thereof as described above, a diode in which reverse current is very small can be obtained. Therefore, a diode which is resistant to a breakdown (i.e., has high withstand voltage) can be manufactured.

With the use of a diode manufactured as described in this embodiment, a power diode capable of conducting a larger amount of current than a conventional power diode can be obtained. Alternatively, with the use of the above diode, a rectifier having a higher withstand voltage than a conventional rectifier can be obtained.

This embodiment can be implemented in an appropriate combination with any of structures described in other embodiments.

Embodiment 6

In this embodiment, a manufacturing process of the diode-connected field-effect transistor, including a thin film transistor illustrated in FIGS. 2A and 2B, which can be applied to a power diode and a rectifier of embodiments of the present invention and which is different from those described in Embodiments 4 and 5, will be described with reference to FIGS. 8A to 8E.

In a manner similar to that of Embodiment 4, as illustrated in FIG. 8A, the first electrode 105 is formed over the substrate 101.

Next, as illustrated in FIG. 8B, the oxide semiconductor film 107 and the second electrode 109 are formed over the first electrode 105.

Note that before the oxide semiconductor film is formed by a sputtering method, reverse sputtering in which plasma is generated with an argon gas introduced is preferably performed so that dust attached to or an oxide film formed on the surface of the first electrode 105 is removed, in which case the resistance at the interface between the first electrode 105 and the oxide semiconductor film can be reduced. Note that instead of an argon atmosphere, a nitrogen atmosphere, a helium atmosphere, or the like may be used.

The oxide semiconductor film is formed over the substrate 101 and the first electrode 105 by a sputtering method. Then, a conductive film is formed over the oxide semiconductor film.

In this embodiment, the oxide semiconductor film is formed by a sputtering method using an In—Ga—Zn—O-based metal oxide target. In this embodiment, the substrate is held in a treatment chamber in a reduced pressure state, and the substrate is heated to room temperature or a temperature lower than 400° C. Then, the oxide semiconductor film is formed over the substrate 101 and the first electrode 105 in such a manner that a sputtering gas from which hydrogen, water, a hydroxyl group, hydride, or the like is removed is introduced and a metal oxide is used as a target while hydrogen, water, a hydroxyl group, hydride, or the like remaining in the treatment chamber is removed. An entrapment vacuum pump is preferably used for removing hydrogen, water, a hydroxyl group, hydride, or the like remaining in the treatment chamber. For example, a cryopump, an ion pump, or a titanium sublimation pump is preferably used. An evacuation unit may be a turbo pump provided with a cold trap. From the treatment chamber evacuated with a cryopump, for example, hydrogen, water, a hydroxyl group, hydride (preferably, also a compound containing a carbon atom), or the like is eliminated; thus, the concentration of impurities contained in the oxide semiconductor film formed in the treatment chamber can be reduced. Further, sputtering formation is performed while hydrogen, water, a hydroxyl group, hydride, or the like remaining in the treatment chamber is removed with a cryopump, whereby an oxide semiconductor film in which impurities such as hydrogen atoms and water are reduced can be formed even at a substrate temperature of room temperature to a temperature lower than 400° C.

In this embodiment, film formation conditions where the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa, the direct-current (DC) power is 0.5 kW, and the atmosphere is an oxygen atmosphere (the proportion of oxygen flow is 100%) are employed. Note that a pulsed direct current (DC) power source is preferable because powder substances (also referred to as particles or dust) generated in film formation can be reduced and the film thickness can be uniform. The oxide semiconductor film preferably has a thickness of 30 nm to 3000 nm. Note that the appropriate thickness of the oxide semiconductor film differs depending on the material to be used; therefore, the thickness may be determined as appropriate in accordance with the material.

Note that the sputtering method and sputtering apparatus that are used for forming the insulating film 103 can be used as appropriate as a sputtering method and a sputtering apparatus for forming the oxide semiconductor film.

Next, a conductive film for forming the second electrode 109 is formed using the material and method that are used for forming the first electrode 105.

Next, in a manner similar to that of Embodiment 4, the conductive film for forming the second electrode 109 and the oxide semiconductor film for forming the oxide semiconductor film 107 are etched so that the second electrode 109 and the oxide semiconductor film 107 having an island shape are formed. The etching conditions (such as an etchant, etching time, and temperature) are adjusted as appropriate in accordance with the material in order to form the oxide semiconductor film 107 and the second electrode 109 having desired shapes.

Next, as illustrated in FIG. 8C, in a manner similar to that of Embodiment 4, the gate insulating film 111 is formed over the first electrode 105, the oxide semiconductor film 107, and the second electrode 109. As the gate insulating film 111, a gate insulating film that has a favorable characteristic of an interface between the gate insulating film 111 and the oxide semiconductor film 107 is preferable. The gate insulating film 111 is preferably formed by a high density plasma CVD method using microwaves (2.45 GHz), in which case the gate insulating film 111 can be dense and can have high withstand voltage and high quality. Another method such as a sputtering method or a plasma CVD method can be employed as long as the method enables a good-quality insulating film to be formed as the gate insulating film.

Note that before the gate insulating film 111 is formed, reverse sputtering is preferably performed so that resist residues and the like attached to at least a surface of the oxide semiconductor film 107 can be removed.

Further, before the gate insulating film 111 is formed, hydrogen, water, a hydroxyl group, hydride, or the like attached to an exposed surface of the oxide semiconductor film may be removed by plasma treatment using a gas such as N₂O, N₂, or Ar. Alternatively, plasma treatment may be performed using a mixed gas of oxygen and argon. In the case where plasma treatment is performed, the gate insulating film 111 which is to be in contact with part of the oxide semiconductor film is preferably formed without being exposed to air.

Further, it is preferable that the substrate 101 over which components up to and including the first electrode 105 to the second electrode 109 are formed be preheated in a preheating chamber in a sputtering apparatus as pretreatment to eliminate and remove hydrogen, water, a hydroxyl group, hydride, or the like adsorbed on the substrate 101 so that hydrogen, water, a hydroxyl group, hydride, or the like is contained as little as possible in the gate insulating film 111. Alternatively, it is preferable that the substrate 101 be preheated in a preheating chamber in a sputtering apparatus to eliminate and remove impurities such as hydrogen, water, a hydroxyl group, hydride, or the like adsorbed on the substrate 101 after the gate insulating film 111 is formed. Note that the temperature of the preheating is 100° C. to 400° C., preferably 150° C. to 300° C. A cryopump is preferable as an evacuation unit provided in the preheating chamber. Note that this preheating treatment can be omitted.

The gate insulating film 111 may have a structure in which a silicon oxide film and a silicon nitride film are stacked in that order over the first electrode 105, the oxide semiconductor film 107, and the second electrode 109. For example, a silicon oxide film (SiO_(x) (x>0)) having a thickness of 5 nm to 300 nm is formed as a first gate insulating film by a sputtering method and a silicon nitride film (SiN_(y) (y>0)) having a thickness of 50 nm to 200 nm is stacked as a second gate insulating film over the first gate insulating film, whereby the gate insulating film 111 is formed.

Next, as illustrated in FIG. 8C, in a manner similar to that of Embodiment 4, the third electrode 113 and the third electrode 115 that function as a gate electrode are formed over the gate insulating film 111.

Through the above process, the thin film transistor 133 including the oxide semiconductor film 107 in which the hydrogen concentration is reduced can be manufactured.

Hydrogen, water, a hydroxyl group, hydride, or the like remaining in a reaction atmosphere is removed in forming the oxide semiconductor film as described above, whereby the concentration of hydrogen in the oxide semiconductor film can be reduced. Thus, stabilization of the oxide semiconductor film can be achieved.

Next, as illustrated in FIG. 8D, in a manner similar to that of Embodiment 4, the contact hole 119, the contact hole 121, and the contact hole 123 are formed after the insulating film 117 is formed over the gate insulating film 111, the third electrode 113, and the third electrode 115.

Next, as illustrated in FIG. 8E, in a manner similar to that of Embodiment 4, the wiring 125 and the wiring 131 are formed.

In a manner similar to that of Embodiment 4, after the formation of the insulating film 117, heat treatment may be further performed at a temperature of 100° C. to 200° C. in air for 1 hour to 30 hours. A normally-off thin film transistor can be obtained by this heat treatment. Therefore, the reliability of a semiconductor device can be improved.

Note that a planarization insulating film for planarization may be provided between the third electrodes 113 and 115 and the wirings 125 and 131.

Hydrogen, water, a hydroxyl group, hydride, or the like remaining in a reaction atmosphere is removed in forming the oxide semiconductor film as described above, whereby the concentration of hydrogen in the oxide semiconductor film can be reduced and the oxide semiconductor film can be purified. Thus, stabilization of the oxide semiconductor film can be achieved. In addition, an oxide semiconductor film which has an extremely small number of minority carriers and a wide band gap can be formed by heat treatment at a temperature of lower than or equal to the glass transition temperature. As a result, a thin film transistor can be formed using a large-area substrate; thus, the mass productivity can be improved. In addition, with the use of the purified oxide semiconductor film whose hydrogen concentration is reduced, it is possible to manufacture a thin film transistor which is suitable for higher definition, has high operation speed, and is capable of conducting a large amount of current when turned on and almost no current when turned off.

By connecting a source or a drain of a thin film transistor to a gate thereof as described above, a diode in which reverse current is very small can be obtained. Therefore, a diode which is resistant to a breakdown (i.e., has high withstand voltage) can be manufactured.

This embodiment can be implemented in an appropriate combination with any of structures described in other embodiments.

With the use of a diode manufactured as described in this embodiment, a power diode capable of conducting a larger amount of current than a conventional power diode can be obtained. Alternatively, with the use of the above diode, a rectifier having a higher withstand voltage than a conventional rectifier can be obtained.

Embodiment 7

The rectifier described in the above embodiment can be used as a rectifier circuit of a semiconductor device capable of wireless communication, for example. Here, the semiconductor device capable of wireless communication refers to a device called an RF chip, an RF tag, or the like.

An example of a structure of a semiconductor device 200 is illustrated in FIG. 10. The semiconductor device 200 includes an antenna circuit 202, a demodulation circuit 203, a clock generation circuit 204, a power supply circuit 205, a control circuit 206, a memory circuit 207, an encoding circuit 208, and a modulation circuit 209.

The antenna circuit 202 converts carrier waves supplied from a reader/writer 210 into alternating current electrical signals. The antenna circuit 202 includes any of the power diodes or rectifiers described in Embodiment 1 and illustrated in FIGS. 1A-1, 1A-2, 1B-1, 1B-2, 1C-1, and 1C-2.

The demodulation circuit 203 demodulates the alternating current electrical signal that is converted by the antenna circuit 202 and transmits the demodulated signal to the control circuit 206. It is to be noted that the demodulation circuit 203 need not be provided if there is no particular need for it.

The clock generation circuit 204 supplies a clock signal needed for operation to the control circuit 206, the memory circuit 207, and the encoding circuit 208. For examples of the structure of the circuit, the structure may be set to be that of an oscillation circuit or a frequency divider circuit.

The power supply circuit 205 generates a power supply voltage using alternating current electrical signals converted by the antenna circuit 202 and supplies a power supply voltage needed for operation to each circuit.

The control circuit 206 performs analysis of commands and control of the memory circuit 207 based on signals demodulated by the demodulation circuit 203 and performs output and the like to the modulation circuit 209 of data to be transmitted to the outside.

The memory circuit 207 is a kind of memory that can store information that the semiconductor device 200 should have. The memory circuit 207 includes a circuit with a memory element and a control circuit that writes and reads out data based on the control circuit 206. At the very least, individual identification information (ID) about the semiconductor device 200 itself is stored in the memory circuit 207. The individual identification information (ID) is used to differentiate among response devices (among different response devices that belong to the user as well as response devices that belong to people other than the user). If the content of the memory circuit 207 is to be specific information (individual identification information (ID) or the like) about the semiconductor device 200, a nonvolatile memory, which can retain information without the supply of power, may be used as the memory circuit 207; if the content of the memory is to be only temporarily retained whenever the semiconductor device 200 performs data processing, a volatile memory may be used.

The encoding circuit 208 converts all or a part of the data that is extracted from data in the memory circuit 207 and transmitted to the reader/writer 210 from the semiconductor device 200 into an encoded signal. It is to be noted that the encoding circuit 208 need not be provided if there is no particular need for it.

The modulation circuit 209 applies load modulation to the antenna circuit 202 based on signals encoded by the encoding circuit 208.

The reader/writer 210 communicates with the semiconductor device 200 wirelessly. The reader/writer 210 is also referred to as a reader/writer. An example of the reader/writer 210 will be described with reference to FIG. 10. The reader/writer 210 includes a receiver portion 211, a transmitter portion 212, a control portion 213, an interface 214, and an antenna circuit (an antenna circuit 215A and an antenna circuit 215B). The antenna circuit (the antenna circuit 215A and the antenna circuit 215B) includes an antenna (an antenna 217A and an antenna 217B) and a resonant capacitor (a resonant capacitor 218A and a resonant capacitor 218B). The antenna (the antenna 217A and the antenna 217B) and the resonant capacitor (the resonant capacitor 218A and the resonant capacitor 218B) form an LC parallel resonant circuit.

The control portion 213 controls the receiver portion 211 and the transmitter portion 212 based on data processing commands and data processing results from an upper-level device 216 via the interface 214. The transmitter portion 212 modulates data processing commands transmitted to the semiconductor device 200 and outputs the results from the antenna circuit 215A as electromagnetic waves. The receiver portion 211 demodulates signals received by the antenna circuit 215B and outputs the data to the control portion 213 as data processing results. When wireless signals are received, the antenna circuit 215B receives an electromotive force that is induced in the antenna circuit 215B by signals output from the semiconductor device 200 as electrical signals. In addition, when signals are transmitted, an induced electric current is supplied to the antenna circuit 215A, and signals are transmitted to the semiconductor device 200 by the antenna circuit 215A.

Next, examples of application of the above-described semiconductor device capable of wireless communication will be described with reference to FIGS. 11A to 11F.

As in FIGS. 11A to 11F, the semiconductor device 200 can be used for a variety of items and systems by utilizing a function of transmitting and receiving an electromagnetic wave. As the items, the following items are given: keys (see FIG. 11A), paper money, coins, securities, bearer bonds, certificates (such as a driver's license or a resident's card, see FIG. 11B), books, containers (such as a Petri dish, see FIG. 11C), personal accessories (such as bags or eyeglasses, see FIG. 11D), packaging containers (such as wrapping paper or bottles, see FIGS. 11E and 11F), recording media (such as a disk or video tape), vehicles (such as bicycles), food, clothing, livingware, electronic devices (such as a liquid crystal display device, an EL display device, a television device, or a portable terminal), or the like. The semiconductor device 200 is fixed to items of a variety of forms such as those above by being attached to the surface or embedded in the items. Further, a system refers to a goods management system, an authentication function system, a distribution system, or the like.

This embodiment can be freely combined with other embodiments.

This application is based on Japanese Patent Application serial No. 2009-251203 filed with Japan Patent Office on Oct. 30, 2009, the entire contents of which are hereby incorporated by reference.

EXPLANATION OF REFERENCE

101: substrate, 103: insulating film, 105: first electrode, 106: first electrode, 107: oxide semiconductor film, 109: second electrode, 111: gate insulating film, 113: third electrode, 115: third electrode, 117: insulating film, 119: contact hole, 121: contact hole, 123: contact hole, 125: wiring, 129: wiring, 131: wiring, 132: wiring, 133: thin film transistor, 141: thin film transistor, 143: thin film transistor, 145: thin film transistor, 151: oxide semiconductor film, 153: dashed line portion, 155: amorphous region, 157: crystal grain, 200: semiconductor device, 202: antenna circuit, 203: demodulation circuit, 204: clock generation circuit, 205: power supply circuit, 206: control circuit, 207: memory circuit, 208: encoding circuit, 209: modulation circuit, 210: reader/writer, 211: receiver portion, 212: transmitting portion, 213: control portion, 214: interface, 215A: antenna circuit, 215B: antenna circuit, 216: upper-level device, 217A: antenna, 217B: antenna, 218A: resonant capacitor, and 218B: resonant capacitor. 

The invention claimed is:
 1. A rectifier comprising a first non-linear element and a second non-linear element, each of the first non-linear element and the second non-linear element comprising: a first electrode provided over a substrate; an oxide semiconductor film provided on and in contact with the first electrode; a second electrode provided on and in contact with the oxide semiconductor film; a gate insulating film covering the first electrode, the oxide semiconductor film, and the second electrode; and a third electrode provided in contact with the gate insulating film and adjacent to a side surface of the oxide semiconductor film, the third electrode being connected to the first electrode or the second electrode, wherein an anode of the first non-linear element is connected to a lower potential side reference potential, wherein a cathode of the first non-linear element is connected to an input portion and an anode of the second non-linear element, and wherein a cathode of the second non-linear element is connected to an output portion.
 2. The rectifier according to claim 1, wherein the oxide semiconductor film has a concentration of hydrogen detected by secondary ion mass spectrometry of 5×10¹⁹ atoms/cm³ or less.
 3. The rectifier according to claim 1, wherein the first electrode functions as one of a source electrode and a drain electrode, wherein the second electrode functions as the other of the source electrode and the drain electrode, and wherein the third electrode functions as a gate electrode.
 4. The rectifier according to claim 1, wherein the oxide semiconductor film has a carrier concentration of 5×10¹⁴ atoms/cm³ or less.
 5. The rectifier according to claim 1, wherein at least a portion of the gate insulating film which is in contact with the oxide semiconductor film is an oxide insulating film.
 6. A semiconductor device comprising the rectifier according to claim
 1. 7. A rectifier comprising a first non-linear element and a second non-linear element, each of the first non-linear element and the second non-linear element comprising: a first electrode provided over a substrate; an oxide semiconductor film provided on and in contact with the first electrode; a second electrode provided on and in contact with the oxide semiconductor film; a gate insulating film covering the first electrode, the oxide semiconductor film, and the second electrode; and a third electrode having a ring shape, the third electrode being provided in contact with the gate insulating film and adjacent to a side surface of the oxide semiconductor film, the third electrode surrounding the second electrode, and the third electrode being connected to the first electrode or the second electrode, wherein an anode of the first non-linear element is connected to a lower potential side reference potential, wherein a cathode of the first non-linear element is connected to an input portion and an anode of the second non-linear element, and wherein a cathode of the second non-linear element is connected to an output portion.
 8. The rectifier according to claim 7, wherein the oxide semiconductor film has a concentration of hydrogen detected by secondary ion mass spectrometry of 5×10¹⁹ atoms/cm³ or less.
 9. The rectifier according to claim 7, wherein the first electrode functions as one of a source electrode and a drain electrode, wherein the second electrode functions as the other of the source electrode and the drain electrode, and wherein the third electrode functions as a gate electrode.
 10. The rectifier according to claim 7, wherein the oxide semiconductor film has a carrier concentration of 5×10¹⁴ atoms/cm³ or less.
 11. The rectifier according to claim 7, wherein at least a portion of the gate insulating film which is in contact with the oxide semiconductor film is an oxide insulating film.
 12. A semiconductor device comprising the rectifier according to claim
 7. 